blob: 86b533e7d643e128ef264bd066607a292f7da60b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
|
#include <linux/sizes.h>
/*
* common
*/
/* UART */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
230400, 500000, 1500000 }
/* Memory usage */
#define CONFIG_SYS_MAXARGS 24
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 * 32)
#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024)
#define CONFIG_ENV_CALLBACK_LIST_STATIC "boardid:boardid,active_port:active_port,voiceboardid:voiceboardid,"
/*
* 6878
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x82600000
#define CONFIG_SYS_INIT_RAM_SIZE 0x00020000
#define CONFIG_SYS_SEC_CRED_ADDR ((CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_SIZE)-0x400)
/* RAM */
#define PHYS_SDRAM_1 0x00000000UL
#define PHYS_SDRAM_1_SIZE (2UL * SZ_1G) /* Maximum possible bnk 0 size */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* U-Boot */
#if defined(CONFIG_TPL_BUILD)
#define CONFIG_SPL_MAX_SIZE 0x00040000
#define CONFIG_SPL_BSS_START_ADDR 0x00120000
#define CONFIG_SPL_BSS_MAX_SIZE 0x8000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_TPL_TEXT_BASE + SZ_1M)
#define CONFIG_SYS_PAGETBL_BASE CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SYS_PAGETBL_SIZE 0x00004000
#define CONFIG_SYS_MALLOC_SIMPLE
#elif defined(CONFIG_SPL_BUILD)
#if !defined(CONFIG_BCMBCA_BOARD_TK_PROG)
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SPL_MAX_SIZE 0x00010000
#else
/* special layout for TKMFG framework */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SEC_CRED_ADDR-GENERATED_GBL_DATA_SIZE)
#define CONFIG_SPL_MAX_SIZE 0x00014000
#endif
#define CONFIG_SYS_PAGETBL_BASE 0x82c10000
#define CONFIG_SYS_PAGETBL_SIZE 0x8000
#define CONFIG_SYS_MALLOC_SIMPLE
#else
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M)
#endif
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_TEXT_BASE)
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SPL_LOAD_FIT_ADDRESS (CONFIG_TPL_TEXT_BASE + 0x2000000)
#ifdef CONFIG_NAND
#define CONFIG_SYS_NAND_BASE 0xff801800
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* dummy definition to make spl nand image loader happy */
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x100000
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00100000
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
#define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024) // max possible size
#endif /* CONFIG_NAND */
#define CONFIG_TPL_UBI
#define CONFIG_SPL_UBI_MAX_VOL_LEBS 256
#define CONFIG_SPL_UBI_MAX_PEB_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_SPL_UBI_IMG_OFFSET 0x100000
#define CONFIG_SPL_UBI_MAX_PEBS 4096
#define CONFIG_SPL_UBI_VOL_IDS 8
#define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0
#define CONFIG_SPL_UBI_PEB_OFFSET 4
#define CONFIG_SPL_UBI_VID_OFFSET 512
#define CONFIG_SPL_UBI_LEB_START 2048
#define CONFIG_SPL_UBI_INFO_ADDR (CONFIG_SPL_LOAD_FIT_ADDRESS - 0x1000000)
//#define CONFIG_UBI_SILENCE_MSG
#ifdef CONFIG_MMC
#ifdef CONFIG_TPL_BUILD
#elif CONFIG_SPL_BUILD
#endif
#endif /* CONFIG_MMC */
#define CONFIG_SYS_MTDPARTS_RUNTIME
/*
* bcm96878
*/
#define CONFIG_ARCH_CPU_INIT
#define COUNTER_FREQUENCY 50000000
#define CONFIG_ENV_SIZE (8 * 1024)
#define CONFIG_SYS_BOOTMAPSZ (128 << 20)
#define CONFIG_SYS_FDT_PAD 0x80000
#if !defined(CONFIG_TPL_ATF)
#define CONFIG_ARMV7_NONSEC
#define CONFIG_SMP_PEN_ADDR 0x0
#endif
#ifdef CONFIG_USB_OHCI_HCD
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#endif /* CONFIG_USB_OHCI_HCD */
|