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<title>bcm63xx/atf/include/lib/extensions, branch master</title>
<subtitle>Broadcom-s Trusted Firmware A</subtitle>
<id>https://git-03.infra.openwrt.org/project/bcm63xx/atf/atom?h=master</id>
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<updated>2019-09-13T13:11:59Z</updated>
<entry>
<title>Refactor ARMv8.3 Pointer Authentication support code</title>
<updated>2019-09-13T13:11:59Z</updated>
<author>
<name>Alexei Fedorov</name>
</author>
<published>2019-09-13T13:11:59Z</published>
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<id>urn:sha1:ed108b56051de5da8024568a06781ce287e86c78</id>
<content type='text'>
This patch provides the following features and makes modifications
listed below:
- Individual APIAKey key generation for each CPU.
- New key generation on every BL31 warm boot and TSP CPU On event.
- Per-CPU storage of APIAKey added in percpu_data[]
  of cpu_data structure.
- `plat_init_apiakey()` function replaced with `plat_init_apkey()`
  which returns 128-bit value and uses Generic timer physical counter
  value to increase the randomness of the generated key.
  The new function can be used for generation of all ARMv8.3-PAuth keys
- ARMv8.3-PAuth specific code placed in `lib\extensions\pauth`.
- New `pauth_init_enable_el1()` and `pauth_init_enable_el3()` functions
  generate, program and enable APIAKey_EL1 for EL1 and EL3 respectively;
  pauth_disable_el1()` and `pauth_disable_el3()` functions disable
  PAuth for EL1 and EL3 respectively;
  `pauth_load_bl31_apiakey()` loads saved per-CPU APIAKey_EL1 from
  cpu-data structure.
- Combined `save_gp_pauth_registers()` function replaces calls to
  `save_gp_registers()` and `pauth_context_save()`;
  `restore_gp_pauth_registers()` replaces `pauth_context_restore()`
  and `restore_gp_registers()` calls.
- `restore_gp_registers_eret()` function removed with corresponding
  code placed in `el3_exit()`.
- Fixed the issue when `pauth_t pauth_ctx` structure allocated space
  for 12 uint64_t PAuth registers instead of 10 by removal of macro
  CTX_PACGAKEY_END from `include/lib/el3_runtime/aarch64/context.h`
  and assigning its value to CTX_PAUTH_REGS_END.
- Use of MODE_SP_ELX and MODE_SP_EL0 macro definitions
  in `msr	spsel`  instruction instead of hard-coded values.
- Changes in documentation related to ARMv8.3-PAuth and ARMv8.5-BTI.

Change-Id: Id18b81cc46f52a783a7e6a09b9f149b6ce803211
Signed-off-by: Alexei Fedorov &lt;Alexei.Fedorov@arm.com&gt;
</content>
</entry>
<entry>
<title>Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__</title>
<updated>2019-08-01T20:14:12Z</updated>
<author>
<name>Julius Werner</name>
</author>
<published>2019-07-09T20:49:11Z</published>
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<id>urn:sha1:d5dfdeb65ff5b7f24dded201d2945c7b74565ce8</id>
<content type='text'>
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.

All common C compilers predefine a macro called __ASSEMBLER__ when
preprocessing a .S file. There is no reason for TF-A to define it's own
__ASSEMBLY__ macro for this purpose instead. To unify code with the
export headers (which use __ASSEMBLER__ to avoid one extra dependency),
let's deprecate __ASSEMBLY__ and switch the code base over to the
predefined standard.

Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417
Signed-off-by: Julius Werner &lt;jwerner@chromium.org&gt;
</content>
</entry>
<entry>
<title>Minor changes to documentation and comments</title>
<updated>2019-02-28T13:35:21Z</updated>
<author>
<name>Antonio Nino Diaz</name>
</author>
<published>2019-02-28T13:35:21Z</published>
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<id>urn:sha1:73308618fee8afc4518c592956b31864e57e48e7</id>
<content type='text'>
Fix some typos and clarify some sentences.

Change-Id: Id276d1ced9a991b4eddc5c47ad9a825e6b29ef74
Signed-off-by: Antonio Nino Diaz &lt;antonio.ninodiaz@arm.com&gt;
</content>
</entry>
<entry>
<title>Sanitise includes across codebase</title>
<updated>2019-01-04T10:43:17Z</updated>
<author>
<name>Antonio Nino Diaz</name>
</author>
<published>2018-12-14T00:18:21Z</published>
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<id>urn:sha1:09d40e0e08283a249e7dce0e106c07c5141f9b7e</id>
<content type='text'>
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz &lt;antonio.ninodiaz@arm.com&gt;
</content>
</entry>
<entry>
<title>Standardise header guards across codebase</title>
<updated>2018-11-08T10:20:19Z</updated>
<author>
<name>Antonio Nino Diaz</name>
</author>
<published>2018-11-08T10:20:19Z</published>
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<id>urn:sha1:c3cf06f1a3a9b9ee8ac7a0ae505f95c45f7dca84</id>
<content type='text'>
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz &lt;antonio.ninodiaz@arm.com&gt;
</content>
</entry>
<entry>
<title>Fix MISRA defects in extension libs</title>
<updated>2018-10-29T14:41:48Z</updated>
<author>
<name>Antonio Nino Diaz</name>
</author>
<published>2018-10-25T15:52:26Z</published>
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<id>urn:sha1:40daecc1be51383c806c0ac953303e47026abcac</id>
<content type='text'>
No functional changes.

Change-Id: I2f28f20944f552447ac4e9e755493cd7c0ea1192
Signed-off-by: Antonio Nino Diaz &lt;antonio.ninodiaz@arm.com&gt;
</content>
</entry>
<entry>
<title>libc: Fix all includes in codebase</title>
<updated>2018-08-22T09:26:05Z</updated>
<author>
<name>Antonio Nino Diaz</name>
</author>
<published>2018-08-16T15:52:57Z</published>
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<id>urn:sha1:93c78ed231a6ea30f1c30ecbbb0f245fa9d75075</id>
<content type='text'>
The codebase was using non-standard headers. It is needed to replace
them by the correct ones so that we can use the new libc headers.

Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d
Acked-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Antonio Nino Diaz &lt;antonio.ninodiaz@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge pull request #1532 from jeenu-arm/misra-fixes</title>
<updated>2018-08-22T09:25:41Z</updated>
<author>
<name>Dimitris Papastamos</name>
</author>
<published>2018-08-22T09:25:41Z</published>
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<id>urn:sha1:11dfe0b49ac8fcb5d1b516a3f52b06bc433ff4d9</id>
<content type='text'>
MISRA fixes</content>
</entry>
<entry>
<title>RAS: MISRA fixes</title>
<updated>2018-08-20T08:05:39Z</updated>
<author>
<name>Jeenu Viswambharan</name>
</author>
<published>2018-08-02T09:14:12Z</published>
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<id>urn:sha1:30a8d96e4689be30b2caeb23fd071fadd1ec87cd</id>
<content type='text'>
These changes address most of the required MISRA rules. In the process,
some from generic code is also fixed.

No functional changes.

Change-Id: I76cacf6e1d73b09510561b5090c2bb66d81bec88
Signed-off-by: Jeenu Viswambharan &lt;jeenu.viswambharan@arm.com&gt;
</content>
</entry>
<entry>
<title>AArch64: Enable MPAM for lower ELs</title>
<updated>2018-08-20T06:32:19Z</updated>
<author>
<name>Jeenu Viswambharan</name>
</author>
<published>2018-07-31T15:13:33Z</published>
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<id>urn:sha1:5f8359188008aff6a2a8e936003827ae771ed99f</id>
<content type='text'>
Memory Partitioning And Monitoring is an Armv8.4 feature that enables
various memory system components and resources to define partitions.
Software running at various ELs can then assign themselves to the
desired partition to control their performance aspects.

With this patch, when ENABLE_MPAM_FOR_LOWER_ELS is set to 1, EL3 allows
lower ELs to access their own MPAM registers without trapping to EL3.
This patch however doesn't make use of partitioning in EL3; platform
initialisation code should configure and use partitions in EL3 if
required.

Change-Id: I5a55b6771ccaa0c1cffc05543d2116b60cbbcdcd
Co-authored-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Jeenu Viswambharan &lt;jeenu.viswambharan@arm.com&gt;
</content>
</entry>
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