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<title>staging/stintel/target/linux, branch master</title>
<subtitle>Staging tree of Stijn Tintel</subtitle>
<id>https://git-03.infra.openwrt.org/openwrt/staging/stintel/atom?h=master</id>
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<updated>2026-10-07T05:56:52Z</updated>
<entry>
<title>realtek: l3: trap IPv4 routes for one DSCP value</title>
<updated>2026-10-07T05:56:52Z</updated>
<author>
<name>Gennaro Cimmino</name>
</author>
<published>2026-10-06T18:35:42Z</published>
<link rel='alternate' type='text/html' href='https://git-03.infra.openwrt.org/openwrt/staging/stintel/commit/?id=60461330279f2ab0828ae704e4d7d9c0e73cd507'/>
<id>urn:sha1:60461330279f2ab0828ae704e4d7d9c0e73cd507</id>
<content type='text'>
An IPv4 route can be for one DSCP value (ip route add ... tos), and the
kernel then routes only packets that carry that value through it. The
switch's entry matches on the destination alone, so an offloaded route
of that kind took every packet for the destination, whatever its DSCP.
Treat it like a multipath route: it gets a trapping entry and the CPU
routes its traffic. otto_l3_fib_del_v4() takes it through the same
branch. The overview at the top of l3.c is updated to match. RTL839x,
which routes through PIE rules and has no trapping entries, no longer
offloads such a route, though an offloaded shorter prefix still forwards
its destination there whatever the DSCP; not tested there.

Of the routes for one destination the kernel notifies only the first,
and one for a DSCP value comes before the one without, so the
destination traps for as long as a DSCP route for it exists, and the
other one arrives as a replace when it goes.

Tested on a Hasivo S1100W-8XGT-SE (RTL9303) with 10.99.0.0/16 via one
gateway, 10.99.70.0/24 tos 0x10 via another, and 8 echoes to the /24
with each TOS value. On main the /24 forwards in hardware and 8 of 8
echoes with TOS 0 and 8 of 8 with TOS 0x10 reach its gateway. With this
change it traps: TOS 0 reaches the /16's gateway and TOS 0x10 the /24's,
8 of 8 each, and adding the /24 without tos, which the kernel does not
notify, keeps it so; on main it stays as before. Deleting the tos route
brings the other one in as a replace, and on both the /24 forwards all
16 to its own gateway. The round on trap rows passes, 46 of 46.

Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Gennaro Cimmino &lt;gcimmino@rayonra.net&gt;
Link: https://github.com/openwrt/openwrt/pull/25683
Signed-off-by: Markus Stockhausen &lt;markus.stockhausen@gmx.de&gt;
</content>
</entry>
<entry>
<title>mediatek: filogic: add Adtran SDG-9000</title>
<updated>2026-10-06T23:03:51Z</updated>
<author>
<name>Daniel Golle</name>
</author>
<published>2025-03-03T13:29:42Z</published>
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<id>urn:sha1:6b84ce8a51310fe6600e10567ba405a6b8f45266</id>
<content type='text'>
The Adtran SDG-9000 is a 10G PoE router in a white steel case with
optional 19" rackmount brackets.

Specifications:
 * MediaTek MT7988A (4x Cortex-A73)
 * 32 GB eMMC
 * 4 GiB DDR4 RAM
 * 1x 10000M/5000M/2500M/1000M/100M combo WAN: RJ45 (Marvell
   CUX3410 PHY) or SFP+ cage, selected at boot
 * 1x 10000M/5000M/2500M/1000M/100M LAN port (Marvell CUX3410 PHY)
 * 8x 2500M/1000M/100M/10M LAN ports with PoE+ (MaxLinear MxL86282
   switch with built-in PHYs), 200 W total PoE budget, two Skyworks
   Si3474 PSE controllers
 * 1x 1000M/100M/10M management port (MT7988 built-in PHY)
 * 240x240 TFT touchscreen (ST7789 SPI LCD with CST816S touch)
 * 1 button (Reset)
 * uC-controlled RGB LED via I2C
 * RGBW LED for each PoE LAN port, 2x LED for the management port,
   3x LED for each 10G port, 2x LED for the SFP+ cage
 * 2x PWM fan (mainboard, power supply)
 * USB 3.0 type A port
 * USB-C console port, 115200 baud, Holtek HT42B534 USB-UART bridge
 * 100-240V AC 50-60Hz power input, IEC 60320 C14 inlet

The WAN port is selected by a GPIO-controlled mux that has no runtime
control, so it is chosen by one of two device tree overlays, wan-phy
and wan-sfp, carried as configurations of the FIT image. The mux is
selected by setting boot_default_config in the U-Boot environment:

 config-1                                       no WAN port
 config-1#mt7988a-smartrg-sdg-9000-wan-phy      RJ45 (CUX3410)
 config-1#mt7988a-smartrg-sdg-9000-wan-sfp      SFP+ cage

MAC addresses (base MFG_MAC from the mfginfo partition; the nvmem
cell index in the DTS is added to the base):

 wan        xx:xx:xx:xx:xx:x0  MFG_MAC
 aux        xx:xx:xx:xx:xx:x0  MFG_MAC
 lan1-lan9  xx:xx:xx:xx:xx:x1  MFG_MAC + 0x1
 br-lan     xx:xx:xx:xx:xx:x1  MFG_MAC + 0x1

The label shows MFG_MAC. aux is the only port present when netifd
starts, as lan1-lan9 appear once the mxl862xx driver has loaded, so
br-lan would take the MAC of aux. board.d sets the MAC of br-lan to
that of lan1-lan9.

Installation:

1. Prepare a TFTP server at 192.168.1.254 and serve the OpenWrt
   initramfs image, renamed to "openwrt.500".
2. Connect to the Management/Auxilary port.
3. Connect to the USB-C console port (USB CDC-ACM, 115200 8n1)
4. Power on the device and type "st" to enter the U-Boot command
   line. The window to do that might be very short, so type it as
   soon as the "U-Boot ..." string appears.
5. Run "setenv boot_mode openwrt; saveenv" to boot from OpenWrt
   partition by default.
6. Run "bootmenu" and select option 6 (TFTP openwrt image and
   boot); "run boot5" is a shortcut for the same. This downloads
   openwrt.500 from the TFTP server and boots it.
7. After OpenWrt finishes booting, download the OpenWrt sysupgrade
   image and write it to eMMC using "sysupgrade".
8. After sysupgrade finishes writing, the device reboots into
   OpenWrt. When the System LED is solid white the device is ready
   for configuration.
9. To use the WAN port, set boot_default_config to one of the values
   above, e.g. from OpenWrt with
   "fw_setenv boot_default_config config-1#mt7988a-smartrg-sdg-9000-wan-sfp".

Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
</content>
</entry>
<entry>
<title>mediatek: filogic: rename netdevs on hotplug</title>
<updated>2026-10-06T23:03:51Z</updated>
<author>
<name>Daniel Golle</name>
</author>
<published>2026-10-04T11:44:33Z</published>
<link rel='alternate' type='text/html' href='https://git-03.infra.openwrt.org/openwrt/staging/stintel/commit/?id=c244bf6e867ef6c01a8f1376656b3a396b2bc70d'/>
<id>urn:sha1:c244bf6e867ef6c01a8f1376656b3a396b2bc70d</id>
<content type='text'>
The preinit hook that applies the label and openwrt,netdev-name DT
properties only sees the netdevs registered before it runs. The ethernet
driver of the SDG-9000 registers its netdevs about two seconds after
preinit has started, so they keep their ethN names.

Move the rename into a shared helper and call it from a hotplug net rule
as well, which handles netdevs registered once userland is up.

Also register the netdev rename for the preinit_netdev boot hook so that
netdevs registered while preinit is running get their DT name before the
preinit interface is configured.

Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
</content>
</entry>
<entry>
<title>generic: add LED triggers for SFP module state and faults</title>
<updated>2026-10-06T23:03:51Z</updated>
<author>
<name>Daniel Golle</name>
</author>
<published>2026-10-04T19:26:42Z</published>
<link rel='alternate' type='text/html' href='https://git-03.infra.openwrt.org/openwrt/staging/stintel/commit/?id=60043441a006395f3d3865d9d30bd89423ba2a1b'/>
<id>urn:sha1:60043441a006395f3d3865d9d30bd89423ba2a1b</id>
<content type='text'>
Register LED triggers for each SFP cage representing module state:

 - present: the module is detected.

 - los: loss of signal, using the module's own declared polarity. I
   split that logic out of the link check into sfp_los_asserted() so
   both use the same code.

 - tx-fault: the state machine reports a transmit fault (init fault,
   fault, re-init, or persistently disabled).

 - error: the module is in error, covering an unreadable EEPROM or I2C
   failure, an unsupported module, or a failed power-up, plus the
   failed-PHY state.

 - fault: either tx-fault or error.

Refresh target patches affected by the generic addition.

Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
</content>
</entry>
<entry>
<title>generic: pse-pd: add fault LED trigger and Si3474 IRQ</title>
<updated>2026-10-06T23:03:51Z</updated>
<author>
<name>Daniel Golle</name>
</author>
<published>2026-10-04T08:12:45Z</published>
<link rel='alternate' type='text/html' href='https://git-03.infra.openwrt.org/openwrt/staging/stintel/commit/?id=b2a6ce658df63b21da2b8a759a7076e1da70a875'/>
<id>urn:sha1:b2a6ce658df63b21da2b8a759a7076e1da70a875</id>
<content type='text'>
Add a per-PI fault LED trigger to the PSE core, an interrupts
property to the Si3474 binding, and INTb handling to the Si3474
driver. Over-current events latch a fault state that the driver
reports as FAULT, which lights the fault trigger. Power good and
power enable changes update the delivering and enabled triggers
without waiting for a regulator operation.

Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
</content>
</entry>
<entry>
<title>kernel: modules: package driver for Hynitron CST816x touch sensor</title>
<updated>2026-10-06T23:03:51Z</updated>
<author>
<name>Daniel Golle</name>
</author>
<published>2025-03-18T14:52:16Z</published>
<link rel='alternate' type='text/html' href='https://git-03.infra.openwrt.org/openwrt/staging/stintel/commit/?id=2bba9c1ba527dc21e810de019d415c10dd4e2ef4'/>
<id>urn:sha1:2bba9c1ba527dc21e810de019d415c10dd4e2ef4</id>
<content type='text'>
Package kernel driver for the Hynitron CST816x touch sensor, found on
ST7789V-based 240x240 px MIPI-DBI display of the Adtran SmartRG SDG-9000.
Import pending patches improving the driver.

Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
</content>
</entry>
<entry>
<title>mipi-dbi: depend on kmod-drm-panel-mipi-dbi</title>
<updated>2026-10-06T23:03:51Z</updated>
<author>
<name>Daniel Golle</name>
</author>
<published>2026-10-03T22:01:29Z</published>
<link rel='alternate' type='text/html' href='https://git-03.infra.openwrt.org/openwrt/staging/stintel/commit/?id=dc7acc188815285d3f0aa9e49cf1b33d3fc313dd'/>
<id>urn:sha1:dc7acc188815285d3f0aa9e49cf1b33d3fc313dd</id>
<content type='text'>
Apply the established OpenWrt packaging pattern of a firmware package
depending on its only consumer.

Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
</content>
</entry>
<entry>
<title>realtek: dts: fix Datto L8 device tree flash layout</title>
<updated>2026-10-06T20:01:03Z</updated>
<author>
<name>Hal Martin</name>
</author>
<published>2026-10-06T19:58:59Z</published>
<link rel='alternate' type='text/html' href='https://git-03.infra.openwrt.org/openwrt/staging/stintel/commit/?id=82ad0727ad89c1f5b3624a55c54d50134d4416fd'/>
<id>urn:sha1:82ad0727ad89c1f5b3624a55c54d50134d4416fd</id>
<content type='text'>
u-boot-env2 overlapped with the cfg partition

Corrected size of u-boot-env2

Fixes: 741ac4939648 ("realtek: add support for Datto L8")
Signed-off-by: Hal Martin &lt;hal.martin@gmail.com&gt;
Link: https://github.com/openwrt/openwrt/pull/25676
Signed-off-by: Markus Stockhausen &lt;markus.stockhausen@gmx.de&gt;
</content>
</entry>
<entry>
<title>realtek: rtl930x: add SPI/GPIO pinmux states</title>
<updated>2026-10-06T18:06:32Z</updated>
<author>
<name>Oskari Lemmelä</name>
</author>
<published>2026-09-27T12:01:18Z</published>
<link rel='alternate' type='text/html' href='https://git-03.infra.openwrt.org/openwrt/staging/stintel/commit/?id=7bcea4a8f45313a418a8800fd6e014b1364fe788'/>
<id>urn:sha1:7bcea4a8f45313a418a8800fd6e014b1364fe788</id>
<content type='text'>
Allow boards to reclaim GPIO3-5, GPIO6 (CS1), and GPIO7 (CS0)
independently without changing other SPI_CTRL1 settings.
Match the pinmux state names used in rtl931x.dtsi.

Signed-off-by: Oskari Lemmelä &lt;oskari@lemmela.net&gt;
Link: https://github.com/openwrt/openwrt/pull/25521
Signed-off-by: Markus Stockhausen &lt;markus.stockhausen@gmx.de&gt;
</content>
</entry>
<entry>
<title>realtek: l3: decode the route dump with the route readers</title>
<updated>2026-10-06T17:44:23Z</updated>
<author>
<name>Gennaro Cimmino</name>
</author>
<published>2026-10-06T13:27:30Z</published>
<link rel='alternate' type='text/html' href='https://git-03.infra.openwrt.org/openwrt/staging/stintel/commit/?id=6ae4fc026421b05ba885c0907aaf4e2fcfa7394c'/>
<id>urn:sha1:6ae4fc026421b05ba885c0907aaf4e2fcfa7394c</id>
<content type='text'>
The debugfs dump kept a record of its own, otto_l3_930x_dump_rec, with a
copy of a route's attributes, and decoded host and prefix rows with its
own copies of the readers' field positions. Split the decoding out of
otto_l3_930x_host_route_read() and otto_l3_930x_route_read() into
decoders that work on a fetched row, use them in the readers, the dump
and the hit clearing, and keep in the record only where an entry sits
and the route it holds.

The dump prints the same. The two debug lines that showed the prefix
reader's intermediate host route, default route and mask bits go with
the decoding they sat in; the prefix length the reader still prints is
what they add up to.

Tested on a Hasivo S1100W-8XGT-SE (RTL9303) with IPv4 host routes and
IPv4 and IPv6 prefix routes, forwarding and trapping. The routes dump,
taken after traffic to the forwarding ones and again after
clear_route_hits, matches main field by field, 28 rows each. Left out of
the comparison are the ULA prefix each boot picks, and the hit bit
outside the three rows that carried the test traffic, which other
traffic can set at any moment. On those three rows the hit bit goes from
1 to 0.

Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Gennaro Cimmino &lt;gcimmino@rayonra.net&gt;
Link: https://github.com/openwrt/openwrt/pull/25669
Signed-off-by: Markus Stockhausen &lt;markus.stockhausen@gmx.de&gt;
</content>
</entry>
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